[K Reloaded]

Originariamente inviato da Cryptik

Naming and meaning of the CPU gtl ref's, and land pin assignment names (Kindly provided by Mikeyakame):

CPU GTL Reference (0/2 Lane0/Lane2)
GTL Reference Data Strobe Input Buffer Middle/End Landing Pins 0 & 2. (GTLREF0/GTLREF2)

CPU GTL Reference (1/3 Lane1/Lane3)
GTL Reference Address Strobe Input Buffer Middle/End Landing Pins 1 & 3 ( GTLREF1/GTLREF3 )

For quad-core multi-die chips:
Middle Landing Pins (GTLREF0/1) act as input buffer for DIE0, End Landing Pins ( GTLREF2/3 ) act as input buffer for DIE1.

For dual core single-die chips:
Middle Landing Pin (GTLREF0/1) acts as input buffer for DIE0, End Landing Pin (GTLREF2/3) uncertain if used. Either unused and terminated to open drain Vtt or used as reference for middle pins as margin of error.

Things to note concerning adjustment:
Address strobe Pins (GTLREF1/3) will generally tolerate small variance with respect to reference voltage accuracy, and should in most cases be setup a little lower with respect to Data strobe Reference multiplier or voltage.
Why?
Probably the same reason as any other reference or input voltage for clock strobes, signal resonance or cross talking.

Data strobe pins (GTLREF0/2) will not tolerate being out by more than 0.5-1% below nominal, but will tolerate slightly more above nominal. Keep set values above Address Strobe GTL multiplier/voltage offset.
Why?
Works better in almost all situations, don't know why until I get a chance to monitor on a logic analyzer.
By How Much?
Varies according to FSB base clock, higher the FSB BCLK the smaller the difference will probably need to be at least with respect to the Diff Amplitude driving the clock.

Also not that when you are adjusting the GTL Refs with a board that using a fixed multiplier and a modifier (eg: +/- in mv) the resultant Vref will be slightly different for the data strobe lanes and the address strobe lanes, as shown by this example (Kindly provided by Seban):

Calculations made for a Vtt = 1.365v

GTL Ref 0 = +50mv = 0.9336025v
GTL Ref 1 = +10mv = 0.9381305v
GTL Ref 2 = +50mv
GTL Ref 3 = +10mv

GTL Ref 0 = +30mv = 0.9136025v
GTL Ref 1 = -10mv = 0.9181305v
GTL Ref 2 = +30mv
GTL Ref 3 = -10mv

As you can see, the resulting Vrefs are not quite equal, but they are close enough for the sake of GTL Ref adjustment. The aim is not to have the Vrefs all exactly the same, but to find the GTL Ref settings that give you the most stability.

un aggiornamento sul GTL